An insulated gate bipolar transistor (IGBT) which is one of power semiconductor elements has the high-speed switching characteristics and voltage-driven characteristics of an insulated gate field effect transistor (MOSFET), and the low on-voltage characteristics of a bipolar transistor. The application range of the IGBT has expanded from the devices according to the related art, such as a general-purpose inverter, an AC servo system, an uninterruptible power supply (UPS), and a switching power supply, to a DC-DC step-up converter for a hybrid vehicle.
The following method has been proposed as a method for manufacturing the above-mentioned semiconductor element. A front surface structure of the element is formed on the front surface side of a silicon (Si) substrate and the rear surface is ground to reduce the thickness of the substrate. A buffer layer and a contact layer are formed on the rear surface of the silicon substrate. Then, an aluminum silicon (AlSi) layer which has a thickness that is equal to or greater than 0.3 μm and equal to or less than 1.0 μm and a silicon concentration that is equal to or greater than 0.5 wt % and equal to or less than 2 wt %, preferably, less than 1 wt % is formed on the surface of the contact layer on the rear surface. Then, a plurality of metal layers made of, for example, titanium (Ti), nickel (Ni), and gold (Au) is sequentially formed on the surface of the aluminum silicon layer by vapor deposition or sputtering (for example, see the following Patent Document 1).
In the mounting of a vertical semiconductor element, such as an IGBT having electrodes on the front and rear surfaces, a rear surface electrode, such as a collector electrode, is bonded to a metal plate, which will be a heat sink, by solder. In general, a front surface electrode, such as an emitter electrode, is bonded by wire bonding using an aluminum wire. However, in recent years, in some cases, solder has been used to bond the front surface electrode. When solder is used to bond the front surface electrode, it is possible to significantly improve various characteristics. For example, it is possible to increase mounting density and current density, to reduce wiring capacity for increasing a switching speed, and to improve the cooling efficiency of a semiconductor device.
As a semiconductor device in which other members are soldered to the front surface electrode of the semiconductor element, the following device has been proposed. The rear surface of a first conductor member, which will be a heat sink, is soldered to a front surface electrode of each semiconductor chip and the front surface of a second conductor member is soldered to the rear surface of each semiconductor chip. The rear surface of a third conductor member is soldered to the front surface of the heat sink. A step portion is provided in the heat sink and a thin portion is formed. The bonding area between the heat sink and the third conductor member is less than the bonding area between the heat sink and each semiconductor chip. Each member is sealed with a resin, with the rear surface of the second conductor member and the front surface of the third conductor member being exposed (for example, see the following Patent Document 2).
As another device, a semiconductor device has been proposed which includes a semiconductor element, a first metal body, a second metal body, and a third metal body and is substantially entirely molded by a resin. The first metal body is bonded to the rear surface of the semiconductor element and functions as both an electrode and a radiator. The second metal body is bonded to the front surface of the semiconductor element and functions as both an electrode and a radiator. The third metal body is bonded between the front surface of the semiconductor element and the second metal body. The thickness of the semiconductor element is reduced such that the shear stress of the front surface of the semiconductor element is reduced or a distortion component in a bonding layer for bonding the semiconductor element and the metal body is reduced. In addition, the bonding layer is made of tin (Sn)-based solder (for example, see the following Patent Document 3).
In practice, when other members are soldered to the front surface electrode of the semiconductor element, it is necessary to form a plated film made of, for example, nickel on the surface of the front surface electrode in order to improve the adhesion between solder and the front surface electrode. In general, for example, an electroplating method or an electroless plating method is used as a plating method for forming the plated film. The electroplating method supplies an external current to the member to be plated to reduce and deposit metal ions in a solution on the member to be plated. The electroless plating method chemically reduces and deposits metal ions in a solution on the member to be plated, without using electricity (for example, see the following Non-Patent Document 1). The electroless plating method makes it possible to simplify the structure of a processing apparatus or a treatment process, as compared to the electroplating method which requires an electric circuit, such as a counter electrode or a DC power supply.
The following device has been proposed as a semiconductor device provided with a semiconductor element (semiconductor chip) in which a plated film is formed on the surface of a front surface electrode by the electroless plating method. A rear surface electrode of the semiconductor element is bonded to a circuit pattern formed on an insulating substrate and the front surface electrode is bonded to a connection conductor. An electrode plating film, which is formed by sequentially laminating a nickel plated film and a gold plated film using an electroless plating process using a zincate method, is formed on an aluminum layer forming the front surface electrode of the semiconductor chip. The thermal conductivity of the electrode plating film is uniform in order to form the electrode plating film using the electroless plating process using the zincate method. The electrode plating film is bonded to a connection conductor which will be a radiation path, with a lead-free solder layer which includes little lead interposed therebetween (for example, see the following Patent Document 4).
Next, a method for manufacturing an IGBT will be described as an example of a method for manufacturing a semiconductor device provided with a semiconductor element (semiconductor chip) in which other members can be soldered to a front surface electrode. FIG. 15 is a flowchart illustrating a method for manufacturing a semiconductor device according to the related art. FIGS. 16 to 21 are cross-sectional views illustrating the state of the semiconductor device according to the related art during manufacture. First, as illustrated in FIG. 16, a front surface structure (not illustrated) of an IGBT including, for example, a base region and an emitter region is formed in a surface layer of the front surface of a semiconductor wafer 100 (Step S101). A front surface structure is formed in each region which becomes a semiconductor chip after dicing (cutting). Then, a gate electrode and am emitter electrode which contact a gate region and the emitter region, respectively, is formed as a front surface electrode 101 (Step S102).
Then, as illustrated in FIG. 17, a protective film 102 which is made of polyimide is formed on the entire front surface of the semiconductor wafer 100. Then, the protective film 102 is patterned such that a portion on the front surface electrode 101 of the protective film 102 is removed and an opening portion through which the front surface electrode 101 is exposed is formed. Then, as illustrated in FIG. 18, the rear surface of the semiconductor wafer 100 is ground (back grinding) and the rear surface is etched to thin the semiconductor wafer 100 to the thickness of a product used as a semiconductor device (hereinafter, in some cases, this process is referred to as a “thinning process”) (Step S103). Then, ion implantation and thermal diffusion are performed to form a rear surface structure (not illustrated), such as a collector region, in a surface layer of the rear surface of the semiconductor wafer 100 (Step S104).
Then, as illustrated in FIG. 19, a plurality of metal layers is sequentially formed on the rear surface of the semiconductor wafer 100 by a physical vapor deposition (PVD) method, such as a sputtering method, to form a rear surface electrode 103 (Step S105). Then, as illustrated in FIG. 20, a supporting substrate 104 is bonded to the rear surface of the semiconductor wafer 100 to protect the rear surface electrode 103. Then, as illustrated in FIG. 21, a plurality of plated films 105 is sequentially formed on the surface of the front surface electrode 101 by the electroless plating process to form an electrode plating film (Step S106). Then, the semiconductor wafer 100 is diced. In this way, a semiconductor chip having the plated film 105 formed on the surface of the front surface electrode 101 is completed.
The following manufacturing method has been proposed as a method for manufacturing the semiconductor device in which the plated film is formed on the surface of the front surface electrode by the electroless plating method. When electroless plating is performed on the surface of an electrode terminal which is formed on the front surface side of a wafer made of silicon, a dicing tape serving as an electrical insulating material is bonded to the entire rear surface of the wafer to insulate the wafer. Then, a plated film is formed on the surface of the electrode terminal by electroless plating (for example, see the following Patent Document 5).
In addition, the following method has been proposed as a method for manufacturing a semiconductor device in which both surfaces of a semiconductor chip are interposed between a pair of metal plates and which is substantially entirely molded by a resin. A heat treatment is performed on a laminate of a first metal body, a first bonding material, a semiconductor element, a second bonding material, a third metal body, a third bonding material, and a second metal body, with the laminate held by a holding jig. In this way, the first metal body and the semiconductor element are bonded to each other, the semiconductor element and the third metal body are bonded to each other, and the third metal body and the second metal body are bonded to each other (for example, see the following Patent Document 6). In the manufacturing method disclosed in Patent Document 6, the occurrence of the operation failure of the semiconductor device caused by the movement of the metal plate bonded to the semiconductor chip during the final bonding process and a reduction in the lifespan of the semiconductor device are suppressed.
The following method has been proposed as a method for manufacturing a semiconductor chip provided in a semiconductor device in which metal bodies that function as both an electrode and a radiator are provided on a front surface electrode and a rear surface electrode of the semiconductor chip and which is substantially entirely molded by a resin. The front surface electrode is formed on the front surface of a semiconductor wafer, with the rear surface of the semiconductor wafer fixed to a supporting substrate (for example, see the following Patent Document 7).
As another method, the following method has been proposed. First, a plated film is formed on the front surface of a semiconductor wafer to form a front surface electrode and the rear surface of the semiconductor wafer is ground to reduce the thickness of the semiconductor wafer. Then, a rear surface electrode including a nickel film is formed on the ground rear surface of the semiconductor wafer and a plated film is formed on the front surface of the semiconductor wafer (for example, see the following Patent Document 8).
As still another method, the following method has been proposed. First, a semiconductor element region in which a plurality of semiconductor regions with different properties is arranged in a predetermined positional relationship is formed on the front surface side of a semiconductor wafer. Then, a front-surface-side electrode which is patterned in a predetermined positional relationship with respect to the positional relationship of the semiconductor element region is formed on the front surface side of the semiconductor wafer. Then, a dicing tape with a dicing frame is fixed to the rear surface of the semiconductor wafer. Then, a plating process is performed on the front surface of the semiconductor wafer while the semiconductor wafer is supported through the dicing frame (for example, see the following Patent Document 9).
As yet another method, the following method has been proposed. First, a plated film is formed on the surface of an aluminum electrode on the front surface of a semiconductor wafer. Then, the rear surface of the semiconductor wafer is ground to reduce the thickness of the semiconductor wafer to a desired value. Then, a rear surface electrode is formed on the ground rear surface of the semiconductor wafer (for example, see the following Patent Document 10).